MEC Co.,Ltd.

MEC’s MECetchBOND CZ series produces unique, super-fine surface roughness by soft-etching copper surfaces, enhancing copper to resin adhesion drastically. Since its launch, the CZ series has been adopted by many package substrate manufacturers around the world, earning a high level of trust as a result of its zero-defect record.

During recent years, Semiconductors such as CPUs (central processing units) and APs (application processors) became increasingly faster and more performant. The L/S (lines and spaces) of the package substrates for such semiconductors continue to become thinner and thinner.

Keeping up with these developments, we have improved our CZ series: Today our CZ series are not only available for package substrates, they are used for a wide range of electronic substrates especially those requiring high reliability.

It is expected future development of the electronics technology will require lines to be even thinner. According to our opinion, the process of soft etching will no longer be able to meet these enhanced requirements.

For this reason we have launched MEC FlatBOND, a chemical agent that helps to enhance adhesion to an equal or higher degree, without performing soft etching.

Not only FlatBOND can help to overcome the boundaries inherent to the soft etching processes, FlatBOND is also available for high-frequency substrates. Nowadays high-frequency substrates are attracting great public attention since higher frequencies are necessary to achieve faster processing for various purposes, including base stations for next-generation communications and automatic braking and driving systems for automobiles. Like conventional substrates, metal-to-resin bonding is necessary for high-frequency substrates. On higher-frequency substrates, however, because signals tend to flow on the metal surface, a delay is likely to occur in the transmission of signals if the metal surface is rough. MEC FlatBOND can achieve an adhesion strength equal to that of the CZ series without creating roughness on the surface, enabling faster processing.

We offer the MEC V-Bond series as an environment-friendly alternative to black oxide treatment, a technology widely employed for pre-lamination treatment of multi-layer electronic substrates. Compared to the traditional black oxide treatment, MEC V-Bond series has achieved:

• Easier wastewater treatment
• Improved work environment
• Good compatibility with halogen-free resins

Now that the need for highly reliable, high-density mother boards is growing in response to the introduction of electronics technologies in cars and the downsizing of information terminal devices, the range of applications of MEC V-Bond series is expanding widely.

Major methods of wiring formation include the subtractive process, which is based on etching, and the semi-additive process (SAP), which is based on plating. Today, the subtractive process is employed for mother boards of HDI substrates, etc. and SAP is employed for package substrates requiring fine wiring to carry semiconductors. Although SAP is suitable for super-fine wiring in general, it has some disadvantages, such as high production costs and difficult process control.

Our MECBRITE EXE series is widely adopted for the forming of wiring patterns of COF (chip on film) substrates carrying semiconductors for displays. Although the COF substrates require fine wiring similar to that of package substrates, the use of our EXE series has enabled production of COF substrates with the subtractive process.

While the MECBRITE EXE series enable to make high-density wiring patterns using the subtractive process, they are also expected to be useful for the production of mobile information terminals. For information terminals such as smartphones and tablet PCs, the capacity of their batteries has been expanding to prolong their usage duration, resulting in acceleration of the development of smaller electronic parts.
As this development makes it necessary for mother boards to have finer and thinner wiring patterns, such wiring formation may worsen the etching factor of the wiring patterns and even make the boards defective. Because achieving fine wiring with SAP is expensive and inefficient, the use of the subtractive process seems crucial.